Robert's Visual Resume

Project Overviews
Software Projects
Contact Information
System Projects
Pipelined ADC


This is an extension to my more conventional resume. A conventional resume does not really do justice to the breath of experience I have. 

So, I have collected a selection of some of the more visual projects here: 

Hope you find it interesting.


(see also my conventional resume).


What's  New

  • Currently working on a JPL/DARPA funded concurrent gate logic demonstrator chip.
  • Completed low jitter PLL.
  • Completed a second order precision bandgap reference in 65nm CMOS. 
  • Completed 2 contracts on 10GBase-T architecture, CDR etc modeling for two startups startup.
  • Introduced innovative patented low cost power meter IP and board

Key Milestones

  • Aquantia funded. My contribution was to build and present the architectural simulation used in funding due diligence.
  • Began sales of low cost RMS power meter.



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 Copyright Robert Heaton 1992 - 2009.
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Last updated: 09/07/2009.